Design Verification Engineer (Direct Placement for Client)
Job description
SIGMADESIGN has collaborated with the world leader in high performance, low-power, C-programmable processors for the embedded systems market. Their comprehensive portfolio of solutions includes system reference designs, processors, integrated system development tools, and optimized libraries. They support solutions in a variety of industries including broadcast, consumer, industrial, automotive, military, wireless, and wireline.
This is an on-site position that is open to remote.
What is Offered:
- Salary range: $150,000-170,000 DOE
- Medical Benefits:
- Blue Cross Blue Shield employee premiums are paid by Employer. Dependent coverage is available with specific premiums paid by employee.
- Dental: Both employee and dependent dental insurance are available with low monthly premiums paid by the employee
- Vision: Premiums are paid by the employee
- Other Benefits:
- Life insurance: $50,000 of term life insurance is provided for each employee
- Disability: Short and long term disability insurance is provided for each employee
- 401k: Company will match dollar to dollar up to 4% of the salary per pay period after your first 90 days with the company.
- Sick Leave days: 96 hours of sick leave time is provided. Sick days accrue at the rate of one day per month of service. Annual sick leave is not accrued from year to year.
- 13 paid holidays
- PTO:
- Less than 5 years 2 weeks per year
- 5-10 years 3 weeks per year
- Over 10 year 4 weeks per year
Primary Function: You will provide technical leadership in design verification for the HyperX Processors.
Essential Job Functions - Responsibilities:
- Develop comprehensive test plans.
- Architect, develop, and enhance verification environment for block and chip testbenches.
- Apply industry standard methodologies including UVM and coverage.
- Verify design in block and chip level environment using directed and constrained random testing, assertion-based verification, and functional verification.
- Perform RTL code coverage, assertion coverage, and gate level simulations.
- Drive and adopt new verification methodologies to improve effectiveness and efficiency.
Education and Experience: (Knowledge, skills, & abilities)
- Pass a post-offer background verification.
- Bachelor of Electrical Engineering (BSEE)
- Preferred: Master of Electrical Engineering or equivalent experience (MSEE)
- 10 years of equivalent experience in ASIC design and verification.
- Experience in verifying designs at system level and block level.
- Strong technical team leading skills.
- Experience using System Verilog, UVM, and System Verilog Assertions.
- Strong experience in ASIC design verification flows and DV methodologies.
- Hands on design verification experience of on-chip networks and processors.
- Strong design debugging capability.
- Knowledge of modern processor or DSP architectures and assembly language.
Work Environment
ENGINEERING: Standard office environment with normal amounts of office related conditions. Occasionally may be required to work in environmental conditions that emulate typical user environments in order to facilitate design testing and validation. Occasionally may be required to travel as required to other facilities, clients or suppliers.
SIGMADESIGN is an Equal Opportunity Employer
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Job Type: Full-time
Pay: $150,000.00 - $170,000.00 per year
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